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Advances in machine learning and deep learning applications towards wafer map defect recognition and classification: a review

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  • Tongwha Kim

    (University of Toronto)

  • Kamran Behdinan

    (University of Toronto)

Abstract

With the high demand and sub-nanometer design for integrated circuits, surface defect complexity and frequency for semiconductor wafers have increased; subsequently emphasizing the need for highly accurate fault detection and root-cause analysis systems as manual defect diagnosis is more time-intensive, and expensive. As such, machine learning and deep learning methods have been integrated to automated inspection systems for wafer map defect recognition and classification to enhance performance, overall yield, and cost-efficiency. Concurrent with algorithm and hardware advances, in particular the onset of neural networks like the convolutional neural network, the literature for wafer map defect detection exploded with new developments to address the limitations of data preprocessing, feature representation and extraction, and model learning strategies. This article aims to provide a comprehensive review on the advancement of machine learning and deep learning applications for wafer map defect recognition and classification. The defect recognition and classification methods are introduced and analyzed for discussion on their respective advantages, limitations, and scalability. The future challenges and trends of wafer map detection research are also presented.

Suggested Citation

  • Tongwha Kim & Kamran Behdinan, 2023. "Advances in machine learning and deep learning applications towards wafer map defect recognition and classification: a review," Journal of Intelligent Manufacturing, Springer, vol. 34(8), pages 3215-3247, December.
    • Handle: RePEc:spr:joinma:v:34:y:2023:i:8:d:10.1007_s10845-022-01994-1
    DOI: 10.1007/s10845-022-01994-1
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    References listed on IDEAS

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    1. Cheng Hao Jin & Hyun-Jin Kim & Yongjun Piao & Meijing Li & Minghao Piao, 2020. "Wafer map defect pattern classification based on convolutional neural network features and error-correcting output codes," Journal of Intelligent Manufacturing, Springer, vol. 31(8), pages 1861-1875, December.
    2. Byunghoon Kim & Young-Seon Jeong & Seung Hoon Tong & Myong K. Jeong, 2020. "A generalised uncertain decision tree for defect classification of multiple wafer maps," International Journal of Production Research, Taylor & Francis Journals, vol. 58(9), pages 2805-2821, May.
    3. Hsu, Shao-Chung & Chien, Chen-Fu, 2007. "Hybrid data mining approach for pattern extraction from wafer bin map to improve yield in semiconductor manufacturing," International Journal of Production Economics, Elsevier, vol. 107(1), pages 88-103, May.
    4. Jinho Kim & Youngmin Lee & Heeyoung Kim, 2018. "Detection and clustering of mixed-type defect patterns in wafer bin maps," IISE Transactions, Taylor & Francis Journals, vol. 50(2), pages 99-111, February.
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