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Analysing semiconductor manufacturing big data for root cause detection of excursion for yield enhancement

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  • Chen-Fu Chien
  • Chiao-Wen Liu
  • Shih-Chung Chuang

Abstract

With the shrinking feature size of integrated circuits driven by continuous technology migrations for wafer fabrication, the control of tightening critical dimensions is critical for yield enhancement, while physical failure analysis is increasingly difficult. In particular, the yield ramp up stage for implementing new technology node involves new production processes, unstable machine configurations, big data with multiple co-linearity and high dimensionality that can hardly rely on previous experience for detecting root causes. This research aims to propose a novel data-driven approach for Analysing semiconductor manufacturing big data for low yield (namely, excursions) diagnosis to detect process root causes for yield enhancement. The proposed approach has shown practical viability to efficiently detect possible root causes of excursion to reduce the trouble shooting time and improve the production yield effectively.

Suggested Citation

  • Chen-Fu Chien & Chiao-Wen Liu & Shih-Chung Chuang, 2017. "Analysing semiconductor manufacturing big data for root cause detection of excursion for yield enhancement," International Journal of Production Research, Taylor & Francis Journals, vol. 55(17), pages 5095-5107, September.
    • Handle: RePEc:taf:tprsxx:v:55:y:2017:i:17:p:5095-5107
    DOI: 10.1080/00207543.2015.1109153
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    References listed on IDEAS

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    1. Chen-Fu Chien & Stephane Dauzere-Peres & Hans Ehm & John W. Fowler & Zhibin Jiang & Shekar Krishnaswamy & Tae-Eog Lee & Lars Monch & Reha Uzsoy, 2011. "Modelling and analysis of semiconductor manufacturing in a shrinking world: challenges and successes," European Journal of Industrial Engineering, Inderscience Enterprises Ltd, vol. 5(3), pages 254-271.
    2. Hsu, Shao-Chung & Chien, Chen-Fu, 2007. "Hybrid data mining approach for pattern extraction from wafer bin map to improve yield in semiconductor manufacturing," International Journal of Production Economics, Elsevier, vol. 107(1), pages 88-103, May.
    3. Terwiesch, Christian & E. Bohn, Roger, 2001. "Learning and process improvement during production ramp-up," International Journal of Production Economics, Elsevier, vol. 70(1), pages 1-19, March.
    4. Piramuthu, Selwyn, 1996. "Feed-forward neural networks and feature construction with correlation information: an integrated framework," European Journal of Operational Research, Elsevier, vol. 93(2), pages 418-427, September.
    5. Jianjun Shi & Shiyu Zhou, 2009. "Quality control and improvement for multistage systems: A survey," IISE Transactions, Taylor & Francis Journals, vol. 41(9), pages 744-753.
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    Cited by:

    1. Wenhan Fu & Chen-Fu Chien & Lizhen Tang, 2022. "Bayesian network for integrated circuit testing probe card fault diagnosis and troubleshooting to empower Industry 3.5 smart production and an empirical study," Journal of Intelligent Manufacturing, Springer, vol. 33(3), pages 785-798, March.
    2. Eduardo Oliveira & Vera L. Miguéis & José L. Borges, 2023. "Automatic root cause analysis in manufacturing: an overview & conceptualization," Journal of Intelligent Manufacturing, Springer, vol. 34(5), pages 2061-2078, June.
    3. Acciarini, Chiara & Cappa, Francesco & Boccardelli, Paolo & Oriani, Raffaele, 2023. "How can organizations leverage big data to innovate their business models? A systematic literature review," Technovation, Elsevier, vol. 123(C).
    4. Seokho Kang, 2020. "Joint modeling of classification and regression for improving faulty wafer detection in semiconductor manufacturing," Journal of Intelligent Manufacturing, Springer, vol. 31(2), pages 319-326, February.
    5. Chen-Fu Chien & Chung-Jen Kuo & Chih-Min Yu, 2020. "Tool allocation to smooth work-in-process for cycle time reduction and an empirical study," Annals of Operations Research, Springer, vol. 290(1), pages 1009-1033, July.

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