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A comparison of fault trees and the Dynamic Flowgraph Methodology for the analysis of FPGA-based safety systems part 2: Theoretical investigations

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  • McNelles, Phillip
  • Renganathan, Guna
  • Zeng, Zhao Chang
  • Chirila, Marius
  • Lu, Lixuan

Abstract

The use of Field Programmable Gate Arrays (FPGAs) in safety-critical systems means that these systems must undergo a detailed reliability and safety analysis. Fault Tree Analysis (FTA) is a well-known method of reliability analysis, while the Dynamic Flowgraph Methodology (DFM), is a modern analysis method that includes time-dependent dynamic properties and was created to model and analyze digital control systems. This paper expands on previous work to examine the fundamental theoretical differences between common FTA methods such as: MOCUS, Binary Decision Diagrams (BDDs), and the “Method of Generalized Consensus†employed by DFM for Multiple-Valued Logic (MVL) systems. This was accomplished using a simplified feed water system. It was found that common FTA methods will not apply the necessary logical reduction operations to reduce MVL systems, resulting in many implicants being returned, and several Prime Implicants (PIs) being missed. Dynamic tests were performed showing that FTA could not explicitly include sink states and dynamic consistency rules in the model, as DFM does. Lastly, the original test system was modified and run for multiple time steps. Differences in dynamic top event probabilities, PIs, and the Fussel–Vesely importance measure are discussed, as are the potential advantages of DFM regarding FPGA-based systems.

Suggested Citation

  • McNelles, Phillip & Renganathan, Guna & Zeng, Zhao Chang & Chirila, Marius & Lu, Lixuan, 2019. "A comparison of fault trees and the Dynamic Flowgraph Methodology for the analysis of FPGA-based safety systems part 2: Theoretical investigations," Reliability Engineering and System Safety, Elsevier, vol. 183(C), pages 60-83.
    • Handle: RePEc:eee:reensy:v:183:y:2019:i:c:p:60-83
    DOI: 10.1016/j.ress.2018.11.004
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    References listed on IDEAS

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    1. McNelles, Phillip & Zeng, Zhao Chang & Renganathan, Guna & Lamarre, Greg & Akl, Yolande & Lu, Lixuan, 2016. "A comparison of Fault Trees and the Dynamic Flowgraph Methodology for the analysis of FPGA-based safety systems Part 1: Reactor trip logic loop reliability analysis," Reliability Engineering and System Safety, Elsevier, vol. 153(C), pages 135-150.
    2. Matuzas, V. & Contini, S., 2015. "Dynamic labelling of BDD and ZBDD for efficient non-coherent fault tree analysis," Reliability Engineering and System Safety, Elsevier, vol. 144(C), pages 183-192.
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    4. Bjorkman, Kim, 2013. "Solving dynamic flowgraph methodology models using binary decision diagrams," Reliability Engineering and System Safety, Elsevier, vol. 111(C), pages 206-216.
    5. Li, Yan & Cui, Lirong & Lin, Cong, 2017. "Modeling and analysis for multi-state systems with discrete-time Markov regime-switching," Reliability Engineering and System Safety, Elsevier, vol. 166(C), pages 41-49.
    6. Ilkka Karanta, 2013. "Implementing dynamic flowgraph methodology models with logic programs," Journal of Risk and Reliability, , vol. 227(3), pages 302-314, June.
    7. Yi, He & Cui, Lirong, 2017. "Distribution and availability for aggregated second-order semi-Markov ternary system with working time omission," Reliability Engineering and System Safety, Elsevier, vol. 166(C), pages 50-60.
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    2. Jung, Sejin & Yoo, Junbeom & Lee, Young-Jun, 2020. "A practical application of NUREG/CR-6430 software safety hazard analysis to FPGA software," Reliability Engineering and System Safety, Elsevier, vol. 202(C).

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