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The Impact of Time Delays for Power Hardware-in-the-Loop Investigations

Author

Listed:
  • Jana Ihrens

    (Institute for Mechatronics in Mechanics, Hamburg University of Technology, 21073 Hamburg, Germany)

  • Stefan Möws

    (Institute of Electrical Power and Energy Technology, Hamburg University of Technology, 21079 Hamburg, Germany)

  • Lennard Wilkening

    (Institute for Mechatronics in Mechanics, Hamburg University of Technology, 21073 Hamburg, Germany)

  • Thorsten A. Kern

    (Institute for Mechatronics in Mechanics, Hamburg University of Technology, 21073 Hamburg, Germany)

  • Christian Becker

    (Institute of Electrical Power and Energy Technology, Hamburg University of Technology, 21079 Hamburg, Germany)

Abstract

Power hardware-in-the-loop (PHiL) simulations provide a powerful environment in the critical process of testing new components and controllers. In this work, we aim to explain the impact of time delays in a PHiL setup and recommend how to consider them in different investigations. The general concept of PHiL, with its necessary components, is explained and the benefits compared to pure simulation and implemented field tests are presented. An example for a flexible PHiL environment is shown in form of the Power Hardware-in-the-Loop Simulation Laboratory (PHiLsLab) at TU Hamburg. In the PHiLsLab, different hardware components are used as the simulator to provide a grid interface via an amplifier system, a real-time simulator by OPAL-RT, a programmable logic controller by Bachmann, and an M-DUINO microcontroller. Benefits and limitations of the different simulators are shown using case examples of conducted investigations. Essentially, all platforms prove to be appropriate and sufficiently powerful simulators, if the time constants and complexity of the investigated case fit the simulator performance. The communication interfaces used between simulator and amplifier system differ in communication speed and delay; therefore, they have to be considered to determine the level of dynamic interactions between the simulated rest of system and the hardware under test.

Suggested Citation

  • Jana Ihrens & Stefan Möws & Lennard Wilkening & Thorsten A. Kern & Christian Becker, 2021. "The Impact of Time Delays for Power Hardware-in-the-Loop Investigations," Energies, MDPI, vol. 14(11), pages 1-15, May.
    • Handle: RePEc:gam:jeners:v:14:y:2021:i:11:p:3154-:d:564149
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    References listed on IDEAS

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    1. Juan Montoya & Ron Brandl & Keerthi Vishwanath & Jay Johnson & Rachid Darbali-Zamora & Adam Summers & Jun Hashimoto & Hiroshi Kikusato & Taha Selim Ustun & Nayeem Ninad & Estefan Apablaza-Arancibia & , 2020. "Advanced Laboratory Testing Methods Using Real-Time Simulation and Hardware-in-the-Loop Techniques: A Survey of Smart Grid International Research Facility Network Activities," Energies, MDPI, vol. 13(12), pages 1-38, June.
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    Cited by:

    1. Annette von Jouanne & Emmanuel Agamloh & Alex Yokochi, 2023. "Power Hardware-in-the-Loop (PHIL): A Review to Advance Smart Inverter-Based Grid-Edge Solutions," Energies, MDPI, vol. 16(2), pages 1-27, January.

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