High-speed graphene transistors with a self-aligned nanowire gate

Graphene transistors There is considerable interest in graphene for high-speed electronics applications because of its high carrier mobility, but conventional device-fabrication processes produce significant defects in the atomically thin carbon sheets that constitute graphene, severely degrading device performance. Liao et al. report a novel fabrication approach that circumvents such degradation by placing a nanowire, with a metallic core and insulating shell, on top of the graphene as a gate electrode. 'Source' and 'drain' electrodes are then deposited on graphene through a self-alignment process that causes no appreciable damage to the graphene lattice and preserves its high carrier mobility. This unique device layout ensures that the edges of the source, drain and gate electrodes are positioned precisely, enabling a transistor performance that is comparable in speed with the best existing devices of a similar size.