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Computing via material topology optimisation

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  • Safonov, Alexander
  • Adamatzky, Andrew

Abstract

We construct logical gates via topology optimisation (aimed to solve a station problem of heat conduction) of a conductive material layout. Values of logical variables are represented by high and low values of a temperature at given sites. Logical functions are implemented via the formation of an optimum layout of conductive material between the sites with loading conditions. We implement and and xor gates and a one-bit binary half-adder.

Suggested Citation

  • Safonov, Alexander & Adamatzky, Andrew, 2018. "Computing via material topology optimisation," Applied Mathematics and Computation, Elsevier, vol. 318(C), pages 109-120.
    • Handle: RePEc:eee:apmaco:v:318:y:2018:i:c:p:109-120
    DOI: 10.1016/j.amc.2017.08.030
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    References listed on IDEAS

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    1. Patrik Christen & Keita Ito & Rafaa Ellouz & Stephanie Boutroy & Elisabeth Sornay-Rendu & Roland D. Chapurlat & Bert van Rietbergen, 2014. "Bone remodelling in humans is load-driven but not lazy," Nature Communications, Nature, vol. 5(1), pages 1-5, December.
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