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Fault-Tolerant Nanocomputers Based On Asynchronous Cellular Automata

Author

Listed:
  • TEIJIRO ISOKAWA

    (Division of Computer Engineering, Himeji Institute of Technology, University of Hyogo, 2167 Shosha, Himeji, Hyogo, 671-2201, Japan)

  • FUKUTARO ABO

    (Division of Computer Engineering, Himeji Institute of Technology, University of Hyogo, 2167 Shosha, Himeji, Hyogo, 671-2201, Japan)

  • FERDINAND PEPER

    (Nanotechnology Group, National Institute of Information and Communications Technology, 588-2 Iwaoka, Iwaoka-cho, Nishi-ku, Kobe, 651-2492, Japan;
    Division of Computer Engineering, Himeji Institute of Technology, University of Hyogo, 2167 Shosha, Himeji, Hyogo, 671-2201, Japan)

  • SUSUMU ADACHI

    (Nanotechnology Group, National Institute of Information and Communications Technology, 588-2 Iwaoka, Iwaoka-cho, Nishi-ku, Kobe, 651-2492, Japan)

  • JIA LEE

    (Nanotechnology Group, National Institute of Information and Communications Technology, 588-2 Iwaoka, Iwaoka-cho, Nishi-ku, Kobe, 651-2492, Japan)

  • NOBUYUKI MATSUI

    (Division of Computer Engineering, Himeji Institute of Technology, University of Hyogo, 2167 Shosha, Himeji, Hyogo, 671-2201, Japan)

  • SHINRO MASHIKO

    (Nanotechnology Group, National Institute of Information and Communications Technology, 588-2 Iwaoka, Iwaoka-cho, Nishi-ku, Kobe, 651-2492, Japan)

Abstract

Cellular Automata (CA) are a promising architecture for computers with nanometer-scale sized components, because their regular structure potentially allows chemical manufacturing techniques based on self-organization. With the increase in integration density, however, comes a decrease in the reliability of the components from which such computers will be built. This paper employs BCH error-correcting codes to construct CA with improved reliability. We construct an asynchronous CA of which a quarter of the (ternary) bits storing a cell's state information may be corrupted without affecting the CA's operations, provided errors are evenly distributed over a cell's bits (no burst errors allowed). Under the same condition, the corruption of half of a cell's bits can be detected.

Suggested Citation

  • Teijiro Isokawa & Fukutaro Abo & Ferdinand Peper & Susumu Adachi & Jia Lee & Nobuyuki Matsui & Shinro Mashiko, 2004. "Fault-Tolerant Nanocomputers Based On Asynchronous Cellular Automata," International Journal of Modern Physics C (IJMPC), World Scientific Publishing Co. Pte. Ltd., vol. 15(06), pages 893-915.
    • Handle: RePEc:wsi:ijmpcx:v:15:y:2004:i:06:n:s0129183104006327
    DOI: 10.1142/S0129183104006327
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