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Side channel attack resistant architecture for elliptic curve cryptosystem

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  • Pravin Zode
  • Raghavendra Deshmukh

Abstract

Significant efforts are required for protection of cryptographic implementation in hostile environment, adversary injects fault in the cryptosystem by varying supply voltage, clock glitch and observe side channel information and tamper to break the cryptographic implementations. In this paper, side channel attack resistant architecture for elliptic curve cryptosystem using pseudo power noise generator, Xilinx IPs System Monitor and Digital Clock Management is proposed. These IPs are customisable and take less area on die size, provides sufficient security. The proposed architecture is robust and implemented without any major design efforts. The architecture is implemented on Xilinx ML605 embedded development board and the result shows that it take very less area as it uses vendor specific customisable IPs.

Suggested Citation

  • Pravin Zode & Raghavendra Deshmukh, 2018. "Side channel attack resistant architecture for elliptic curve cryptosystem," Cyber-Physical Systems, Taylor & Francis Journals, vol. 4(4), pages 205-215, October.
    • Handle: RePEc:taf:tcybxx:v:4:y:2018:i:4:p:205-215
    DOI: 10.1080/23335777.2018.1515163
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