Author
Listed:
- Quoc An Vu
(Center for Integrated Nanostructure Physics, Institute for Basic Science (IBS)
Sungkyunkwan University)
- Yong Seon Shin
(Sungkyunkwan University)
- Young Rae Kim
(Sungkyunkwan University)
- Van Luan Nguyen
(Center for Integrated Nanostructure Physics, Institute for Basic Science (IBS)
Sungkyunkwan University)
- Won Tae Kang
(Sungkyunkwan University)
- Hyun Kim
(Center for Integrated Nanostructure Physics, Institute for Basic Science (IBS)
Sungkyunkwan University)
- Dinh Hoa Luong
(Center for Integrated Nanostructure Physics, Institute for Basic Science (IBS)
Sungkyunkwan University)
- Il Min Lee
(Sungkyunkwan University)
- Kiyoung Lee
(Samsung Advanced Institute of Technology)
- Dong-Su Ko
(Samsung Advanced Institute of Technology)
- Jinseong Heo
(Samsung Advanced Institute of Technology)
- Seongjun Park
(Samsung Advanced Institute of Technology)
- Young Hee Lee
(Center for Integrated Nanostructure Physics, Institute for Basic Science (IBS)
Sungkyunkwan University)
- Woo Jong Yu
(Sungkyunkwan University
Samsung-SKKU Graphene Center (SSGC), Sungkyunkwan University)
Abstract
Concepts of non-volatile memory to replace conventional flash memory have suffered from low material reliability and high off-state current, and the use of a thick, rigid blocking oxide layer in flash memory further restricts vertical scale-up. Here, we report a two-terminal floating gate memory, tunnelling random access memory fabricated by a monolayer MoS2/h-BN/monolayer graphene vertical stack. Our device uses a two-terminal electrode for current flow in the MoS2 channel and simultaneously for charging and discharging the graphene floating gate through the h-BN tunnelling barrier. By effective charge tunnelling through crystalline h-BN layer and storing charges in graphene layer, our memory device demonstrates an ultimately low off-state current of 10−14 A, leading to ultrahigh on/off ratio over 109, about ∼103 times higher than other two-terminal memories. Furthermore, the absence of thick, rigid blocking oxides enables high stretchability (>19%) which is useful for soft electronics.
Suggested Citation
Quoc An Vu & Yong Seon Shin & Young Rae Kim & Van Luan Nguyen & Won Tae Kang & Hyun Kim & Dinh Hoa Luong & Il Min Lee & Kiyoung Lee & Dong-Su Ko & Jinseong Heo & Seongjun Park & Young Hee Lee & Woo Jo, 2016.
"Two-terminal floating-gate memory with van der Waals heterostructures for ultrahigh on/off ratio,"
Nature Communications, Nature, vol. 7(1), pages 1-8, November.
Handle:
RePEc:nat:natcom:v:7:y:2016:i:1:d:10.1038_ncomms12725
DOI: 10.1038/ncomms12725
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