A novel approach to design A5/1 stream cipher using power analysis attack resistant reversible logic gates

Nowadays, various side-channel analysis techniques are playing an important role in cryptography and have brought serious threats on implementations of cryptographic algorithms. Among them, power analysis attack is a powerful cryptanalytic technique, aiming to extract secret data from a cryptographic device by collecting and analysing power consumption traces. Reversible logic gates theoretically consume zero power being the motivation of this work to design a ciphering algorithm. For the first time in literature, we propose a reversible logic synthesis of A5/1 stream cipher, for securing conversations in GSM cellular system in this work. The complete structure of A5/1 stream cipher is deduced to simple logical operations and they are synthesised with reversible gates such as Fredkin, CNOT and CCNOT gates. The performance metrics of the reversible A5/1 stream cipher such as ancilla inputs, garbage outputs and quantum cost are also tabulated.