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Emulator Based on Switching Functions for a Dual Interleaved Buck-Boost Converter

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  • Marco Antonio Sánchez Vázquez
  • Ismael Araujo-Vargas
  • Kevin Cano-Pulido

Abstract

Under the unavailability of some components of a complex system, the Hardware In the Loop ( HIL ) tool allows the emulation of other subsystems. When these devices are not available, a customized emulator can be developed based on the Piecewise Linear Model ( PWLM ) and a numerical method for solving the differential equations system. However, these implementations require the use of a Field Programmable Gate Array ( FPGA ) with extensive hardware resources. In this article we propose the use of switching functions for the modeling of power converters of a Hybrid Power System ( HPS ), allowing the reduction of hardware resources of the FPGA, and the number of steps per switching cycle is increased. The results are compared with SABER simulations and a PWLM evaluated with the Euler method.

Suggested Citation

  • Marco Antonio Sánchez Vázquez & Ismael Araujo-Vargas & Kevin Cano-Pulido, 2019. "Emulator Based on Switching Functions for a Dual Interleaved Buck-Boost Converter," Mathematical Problems in Engineering, Hindawi, vol. 2019, pages 1-10, August.
    • Handle: RePEc:hin:jnlmpe:5930548
    DOI: 10.1155/2019/5930548
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