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High-Speed Implementation of PRESENT on AVR Microcontroller

Author

Listed:
  • Hyeokdong Kwon

    (Division of IT Convergence Engineering, Hansung University, Seoul 136-792, Korea)

  • Young Beom Kim

    (Department of Financial Information Security, Kookmin University, Seoul 02707, Korea)

  • Seog Chung Seo

    (Department of Financial Information Security, Kookmin University, Seoul 02707, Korea
    Department of Information Security, Cryptology, and Mathematics, Kookmin University, Seoul 02707, Korea)

  • Hwajeong Seo

    (Division of IT Convergence Engineering, Hansung University, Seoul 136-792, Korea)

Abstract

We propose the compact PRESENT on embedded processors. To obtain high-performance, PRESENT operations, including an add-round-key, a substitute layer and permutation layer operations are efficiently implemented on target embedded processors. Novel PRESENT implementations support the Electronic Code Book (ECB) and Counter (CTR). The implementation of CTR is improved by using the pre-computation for one substitute layer, two diffusion layer, and two add-round-key operations. Finally, compact PRESENT on target microcontrollers achieved 504.2, 488.2, 488.7, and 491.6 clock cycles per byte for PRESENT-ECB, 16-bit PRESENT-CTR (RAM-based implementation), 16-bit PRESENT-CTR (ROM-based implementation), and 32-bit PRESENT-CTR (ROM-based implementation) modes of operation, respectively. Compared with former implementation, the execution timing is improved by 62.6%, 63.8%, 63.7%, and 63.5% for PRESENT-ECB, 16-bit PRESENT-CTR (RAM based implementation), 16-bit PRESENT-CTR (ROM-based implementation), and 32-bit PRESENT-CTR (ROM-based implementation) modes of operation, respectively.

Suggested Citation

  • Hyeokdong Kwon & Young Beom Kim & Seog Chung Seo & Hwajeong Seo, 2021. "High-Speed Implementation of PRESENT on AVR Microcontroller," Mathematics, MDPI, vol. 9(4), pages 1-15, February.
    • Handle: RePEc:gam:jmathe:v:9:y:2021:i:4:p:374-:d:498744
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