V DS and V GS Depolarization Effect on SiC MOSFET Short-Circuit Withstand Capability Considering Partial Safe Failure-Mode

This paper presents a detailed analysis of 1200 V Silicon Carbide (SiC) power MOSFET exhibiting different short-circuit failure mechanisms and improvement in reliability by V DS and V GS depolarization. The device robustness has undergone an incremental pulse under different density decreasing; either drain-source voltage or gate-driver voltage. Unlike silicon device, the SiC MOSFET failure mechanism firstly displays specific gradual gate-cracks mechanism and progressive gate-damage accumulations greater than 4 µs/9 J·cm −2 . Secondly, a classical drain-source thermal runaway appears, as for silicon devices, in a time greater than 9 µs. Correlations with short-circuit energy measurements and temperature simulations are investigated. It is shown that the first mechanism is an incremental soft gate-failure-mode which can be easily used to detect and protect the device by a direct feedback on the gate-driver. Furthermore, it is highlighted that this new mechanism can be sufficiently consolidated to avoid the second drain-source mechanism which is a hard-failure-mode. For this purpose, it is proposed to sufficiently depolarize the on-state gate-drive voltage to reduce the chip heating-rate and thus to decouple the failure modes. The device is much more robust with a short-circuit withstand time higher than 10 µs, as in silicon, no risk of thermal runaway and with an acceptable penalty on R DS-ON .