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A Multilevel Inverter Topology Using Diode Half-Bridge Circuit with Reduced Power Component

Author

Listed:
  • Jagabar Sathik

    (Renewable Energy Laboratory, Prince Sultan University, Riyadh 11586, Saudi Arabia
    Department of Electrical and Electronics Engineering, SRM Institute of Science and Technology, Kattankulathur Campus, Kattankulathur 603203, India)

  • Shady H. E. Abdel Aleem

    (Department of Electrical Engineering, Valley Higher Institute of Engineering and Technology, Science Valley Academy, Qalyubia 44971, Egypt)

  • Rasoul Shalchi Alishah

    (Department of Electronics, Mid-Sweden University, Holmgatan 10, 851 70 Sundsvall, Sweden)

  • Dhafer Almakhles

    (Renewable Energy Laboratory, Prince Sultan University, Riyadh 11586, Saudi Arabia)

  • Kent Bertilsson

    (Department of Electronics, Mid-Sweden University, Holmgatan 10, 851 70 Sundsvall, Sweden)

  • Mahajan Sagar Bhaskar

    (Renewable Energy Laboratory, Prince Sultan University, Riyadh 11586, Saudi Arabia)

  • George Fernandez Savier

    (Department of Electrical and Electronics Engineering, SRM Institute of Science and Technology, Kattankulathur Campus, Kattankulathur 603203, India)

  • Karthikeyan Dhandapani

    (Department of Electrical and Electronics Engineering, SRM Institute of Science and Technology, Kattankulathur Campus, Kattankulathur 603203, India)

Abstract

This paper presents a new multilevel converter with a reduced number of power components for medium voltage applications. Both symmetric and asymmetric structures of the presented multilevel converter are proposed. The symmetric topology requires equal dc source values, whereas the asymmetric topology uses minimum switch count. However, both structures suffer from high blocking voltage across the switches. To reduce the blocking voltage on switches, an optimal topology is presented and analyzed for the selection of the minimum number of switches and dc sources, while maintaining a low blocking voltage across the switches. A comparative analysis with recently published topologies was performed. The simulation results, as well as the comparative analysis, validated the robustness and effectiveness of the proposed topology in terms of the reduced power loss, lowered number of components, and cost. Furthermore, in addition to the simulation results, the performance of the proposed topology was verified using experimental results of 9, 17, and 25 levels.

Suggested Citation

  • Jagabar Sathik & Shady H. E. Abdel Aleem & Rasoul Shalchi Alishah & Dhafer Almakhles & Kent Bertilsson & Mahajan Sagar Bhaskar & George Fernandez Savier & Karthikeyan Dhandapani, 2021. "A Multilevel Inverter Topology Using Diode Half-Bridge Circuit with Reduced Power Component," Energies, MDPI, vol. 14(21), pages 1-21, November.
    • Handle: RePEc:gam:jeners:v:14:y:2021:i:21:p:7249-:d:671053
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    References listed on IDEAS

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    1. Jorge Lara & Lesedi Masisi & Concepcion Hernandez & Marco A. Arjona & Ambrish Chandra, 2021. "Novel Single-Phase Grid-Tied NPC Five-Level Converter with an Inherent DC-Link Voltage Balancing Strategy for Power Quality Improvement," Energies, MDPI, vol. 14(9), pages 1-22, May.
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    Cited by:

    1. Ignacio Torres & Javier Muñoz & Diego Rojas & Eduardo E. Espinosa, 2022. "Selective Harmonic Elimination Technique for a 27-Level Asymmetric Multilevel Converter," Energies, MDPI, vol. 15(10), pages 1-17, May.
    2. Mustafa Gokdag, 2022. "Modulated Predictive Control to Improve the Steady-State Performance of NSI-Based Electrification Systems," Energies, MDPI, vol. 15(6), pages 1-19, March.

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