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Digital emulator and observer of multicell converter

Author

Listed:
  • Ruelland, R.
  • Gateau, G.
  • Meynard, T.
  • Hapiot, J.C.

Abstract

This article presents the design of a digital real-time emulator dedicated to the simulation of four-level multicell converter. The design has been made using a new tool: the co-simulation. Co-simulation results are presented in this paper and an experimental setup has been realised on a FPGA1Field Programable Gate Array.1 in order to validate this new tool. In the final part, we present the test of an observation loop using this emulator.

Suggested Citation

  • Ruelland, R. & Gateau, G. & Meynard, T. & Hapiot, J.C., 2003. "Digital emulator and observer of multicell converter," Mathematics and Computers in Simulation (MATCOM), Elsevier, vol. 63(3), pages 335-347.
    • Handle: RePEc:eee:matcom:v:63:y:2003:i:3:p:335-347
    DOI: 10.1016/S0378-4754(03)00080-6
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    Cited by:

    1. Yang, Xiaoping & Zhang, Hao & Ma, Xikui, 2009. "Modeling and stability analysis of cascade buck converters with N power stages," Mathematics and Computers in Simulation (MATCOM), Elsevier, vol. 80(3), pages 533-546.

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